1. Field of the Invention.
The present invention relates to horizontal charge coupled devices (HCCDs), and particularly to an HCCD having a multiple reset gate for establishing a more stable, less noisy reference level for reading an output signal of the HCCD.
2. Description of the Prior Art
FIG. 1a illustrates a plan view of a structure of an HCCD according to the prior art. FIG. 1b illustrates the signal waveform diagram corresponding to portions of the HCCD illustrated in FIG. 1a. FIG. 1c illustrates the potential profile taken along line 1c--1c of FIG. 1a.
In an HCCD according to the prior art, as shown in FIG. 1a, a buried or bulk charge coupled device (BCCD) 3 is formed, wherein first poly gates 5 and second poly gates 2 are successively formed over barrier region 4 in an over-lapping manner. As more fully discussed below, with appropriate voltages successively applied to first poly gates 5 and second poly gates 2, electrical charges may be propagated or transferred along the HCCD to reach n+-type floating diffusion region 1. Floating diffusion 1, which is the region to which output terminal Vout is connected through amplifier/inverter circuit 7, is formed adjacent to rightmost second poly gate 2 and receives charge transferred from barrier region 4 of BCCD 3 through application of an appropriate signal to terminal VoG. Second poly gate 2a connected to terminal RG (sometimes referred to herein as reset gate 2a) is used to periodically establish floating diffusion 1 to a reference potential. Reset gate 2a has a channel which is formed in the shape of a horn in order to decrease the partition noise. Outside of the active regions of the HCCD, channel stopper region 6 is formed.
The operation of the aforesaid structure of an HCCD as illustrated in FIG. 1a will be described in more detail with reference to FIG. 1b and FIG. 1c.
Through application of appropriate signals (respectively H and L states) to terminals H.PHI.1 and H.PHI.2 of FIG. 1a as shown in FIG. 1b, signal charges may be propagated or transferred through the HCCD, and with an appropriately timed signal to terminal VoG, the signal charges may be transferred to floating diffusion 1. The signal charges transferred to floating diffusion 1 may be detected or read out through terminal Vout through amplifier/inverter circuit 7, which as is known in the art can be any suitable amplifier or inverter circuit. Periodically, the potential of floating diffusion 1 is reset to an initial reference level. Through application of appropriate H state and L state signals to terminals H.PHI.1, H.PHI.2 and VoG of FIG. 1a, the signal charges may be transferred to n+-type floating diffusion region 1, and may be subsequently discharged to reset drain 1a through application of a H state signal .PHI.RG to terminal RG of reset gate 2a (reset gate 2a thus being turned on). An appropriate bias voltage level is applied to reset drain 1a through terminal RD.
As a result of the above, n+-type floating diffusion region 1, to which output terminal Vout is connected through amplifier/inverter circuit 7, is biased to the initial reference state, and the reference voltage of the output signal on terminal Vout is established.
In the structure of an HCCD according to the prior art, a H state reset signal .PHI.RG is applied to terminal RG of reset gate 2a to discharge the signal charges to reset drain 1a. At this time, because the flow of signal charges stored in n+-type floating diffusion region 1 is redistributed in BCCD 3a (formed by second poly gate 2a) by the application of reset signal .PHI.RG to terminal RG of reset gate 2a, ripple noise and partition noise are generated between a capacitor (such as the capacitance of floating diffusion 1) and a resistor (such as the channel resistance under second poly gate 2a).
As a result thereof, the resulting voltage level established in floating diffusion 1 is unstable and deviates from the desired reference voltage level Vref as shown in FIG. 1c. This undesired deviation of the voltage of floating diffusion 1 from the desired reference level Vref results in "noise" in the signal charges detected or read out through terminal Vout.